[PLARCH23] On the Generality of Matrix Multiplication

(9:50)

[PLARCH23] Library-based Compartmentalisation on CHERI

(12:2)

[PLARCH23] ChatGPT, Make a Secure Malloc for me

(8:16)

[PLARCH23] Fearless Hardware Design

(13:56)

[PLARCH23] PEak: A Single Source of Truth for Hardware Design and Verification

(12:29)

[PLARCH23] NFC:Next-generation Formal verification for high performance Caches

(11:57)

[PLARCH23] Challenges with Hardware-Software Co-design for Sparse Machine Learning on (...) Dataflow

(10:28)

[PLARCH23] Semi-Automated Translation of a Formal ISA Specification to Hardware

(9:29)

[PLARCH23] Non-Newtonian Hardware Design for Longevity

(8:18)

[PLARCH23] Design for Hardware Memory Model Verification

(17:8)

[PLARCH23] New Embedded DSLs for Hardware Design and Verification

(9:30)

[PLARCH23] Mixed-Abstraction HDLs and A Discussion on Other Aspects of HDL Design

(16:24)

[PLARCH23] Nerv: Probabilistic Dynamic Partial Order Reduction for Hardware

(9:59)

[PLARCH23] Stellar: A DSL to Build and Explore Sparse Accelerators

(16:)

[PLARCH23] Sandia's Formal Hardware Design and Verification, Present and Future

(9:37)

[PLARCH23] Leakage models are a leaky abstraction (...)

(11:42)

[PLARCH23] Novel Numerical Hardware Design Methodology - From machine readable spec to optimized RTL

(11:44)